File Menu


New

Click on File-> New in order to restart the software with an empty screen. The current design should be saved before asserting this command, as all the graphic information will be physically removed from the computer memory. No Undo is available to disable the New command.

Open

Click on the above icon. In the list, double-click on the file to load. " .SCH " is the default extension that corresponds to the schematic files.

 

Save

Click on File -> Save to save the schematic diagram with its current name. The default name is " EXAMPLE.SCH ".

Save As

In the case of "Save As…", a new window appears, into which you are to enter the design name. Use the keyboard and type the desired file name. Press " Save ". Your design is now registered within the .SCH appendix.

 

Select Foundry

Click on File -> Select Foundry. The list of available processes appears. The initial design rule file is "default.tec". Various technologies are available from 1.2 µm downto 32-nm. Click on the rule file name and the software reconfigures itself in order to adapt to the new process.

Note that a set of applications was been released for nano-scale technologies, starting 90-nm CMOS technology. These application notes describe the context, trends, MOS performances as well as the implementation in Microwind and Dsch.

Lithography

Year

Metal layers

Core supply (V)

Core Oxide (nm)

Chip size (mm)

Input/output pads

Dsch rule file

1.2µm

1986

2

5.0

25

5x5

250

Cmos12.tec

0.7µm

1988

2

5.0

20

7x7

350

Cmos08.tec

0.5µm

1992

3

3.3

12

10x10

600

Cmos06.tec

0.35µm

1994

5

3.3

7

15x15

800

Cmos035.tec

0.25µm

1996

6

2.5

5

17x17

1000

Cmos025.tec

0.18µm

1998

6

1.8

3

20x20

1500

Cmos018.tec

0.12µm

2001

6-8

1.2

2

22x20

1800

Cmos012.tec

90nm

2003

6-10

1.0-1.2

1.2

25x20

2000

Cmos90n.rul

65nm

2005

6-12

1.0-1.2

1.2

25x20

3000

Cmos65n.rul

45nm 2007 6-12 0.8-1.1 1.2 25x20 4000 Cmos45n.rul
32nm 2010 6-12 0.8-1.1 0.9 25x20 5000 Cmos32n.rul

Generate Spice File

Select the command Generate Spice to convert the schematic diagram into a SPICE compatible file. Notice that Dsch has been made compatible with WinSpice (See www.winspice.com) a freeware SPICE for PC based on Berkeley Spice.  The following window appears. The SPICE text appears on the left side of the screen.

On the right side:

An application note about the interfacing of DSCH 3.5 with WinSpice3 has been released, with details about DC, TRAN, and AC analyses. Click here for more details about this application note.

Generate Sub-circuit

Select the command Generate Subcircuit to convert the schematic diagram into a new symbol which includes the VERILOG description as a sub-circuit. The following window appears. Click "Verilog" to see the VERILOG description that is included in the symbol.

The list of I/Os appear on the left side of the screen. On the right side,

Make Verilog

The conversion of the schematic diagram into a VERILOG description is usefull for compiling the schematic diagram into layout using Microwind. The verilog description is a text with a predefined syntax. Basically, the text includes a description of the module (name, input, output), the internal wires, and the list of primitives. An example of veriolog file generated by DSCH is given below.

COMMENTS: //

MODULE DECLARATION: "module", name, and list of I/Os.

MODULE CONTENTS: list of inputs, of outputs, of internal wires, and the declaration of primitives, always with the primitive keyword first, the name second, and the list of parameters. For example: NOT is the primitive for the inverter, "inv_7" is the cell name, "in1" is the input and "outInv" the output.

MODULE END: "endmodule".

Properties

The command File -> Properties provides some information about the current technology, the percentage of memory used by the schematic diagram and its detailed contents.

In the Technology part, details on the time unit, voltage supply, typical delay and typical wire delay are provided, which configure the delay estimation and current estimation during logic simulation.

Monochrom/Colors

Switch to monochrome: the layout is drawn in black and white. This type of drawing is convenient to build monochrome documentation. Press "Alt"+"Print Screen" to copy the screen to the clipboard. Then, open "Word", click "Edit-> Paste". The screen is inserted into the document.

 

Print

Click on File ->Print Schema to transfer the graphical contents of the screen to the printer. Automatically, DSCH3 is switched to monochrome mode prior to printing. Alternatively, you can make a copy of the window into the clipboard in order to import the screen into your favorite text editor by pressing <Alt>+<Print Screen>. In the text editor or in the graphic editor, simply click on " Edit ->Paste ".

We recommend that you switch to monochrome mode first by invoking the function File -> Monochrom/Color. In that case the layout will be drawn in a white background color using gray levels and patterns.

Leave DSCH

Click on Leave -> Exit DSCH in the main menu. If you have made a design or if you have modified some data, you will be asked to save it. After confirmation, you can return to Windows.

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